Analýza postranních kanálů: efektivní implementace útoků a protiopatření odolná proti poruchám

Abstract

Since side-channel analysis poses a serious threat to cryptographic devices, it became an extensively researched area. Two topics related to side-channel analysis are the main aim of this dissertation thesis: ecient attack implementations and fault-tolerance of SCA countermeasures. Three approaches for time-ecient enhancements of correlation power analysis are proposed: ecient computations, trace aggregation, and edge-detection-based key candidate selection. All three approaches proved to be functional and useful by experimental evaluations. We also evaluate how dierent dependable architectures based on dierent kinds of redundancy aect resistance to side-channel analysis. The results show, that the in- uence is not statistically signicant. In accordance with this result, architectures for dependable and secure design were proposed. These architectures are based on hardware modular redundancy and masking schemes. The case study shows, that the proposed architectures keep the simplicity of the modular redundancy architectures and the SCA resistance of masking schemes, while it signicantly saves resources.

Since side-channel analysis poses a serious threat to cryptographic devices, it became an extensively researched area. Two topics related to side-channel analysis are the main aim of this dissertation thesis: ecient attack implementations and fault-tolerance of SCA countermeasures. Three approaches for time-ecient enhancements of correlation power analysis are proposed: ecient computations, trace aggregation, and edge-detection-based key candidate selection. All three approaches proved to be functional and useful by experimental evaluations. We also evaluate how dierent dependable architectures based on dierent kinds of redundancy aect resistance to side-channel analysis. The results show, that the in uence is not statistically signicant. In accordance with this result, architectures for dependable and secure design were proposed. These architectures are based on hardware modular redundancy and masking schemes. The case study shows, that the proposed architectures keep the simplicity of the modular redundancy architectures and the SCA resistance of masking schemes, while it signicantly saves resources. :