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dc.contributor.authorBarri D.
dc.contributor.authorVacula P.
dc.contributor.authorKotě V.
dc.contributor.authorJakovenko J.
dc.contributor.authorVoves J.
dc.date.accessioned2020-03-17T11:21:46Z
dc.date.available2020-03-17T11:21:46Z
dc.date.issued2019
dc.identifierV3S-333185
dc.identifier.citationBARRI, D., et al. Improvements in the Electrical Performance of IC MOSFET Components Using Diamond Layout Style Versus Traditional Rectangular Layout Style Calculated by Conformal Mapping. IEEE Transactions on Electron Devices. 2019, 66(9), 3718-3725. ISSN 0018-9383. DOI 10.1109/TED.2019.2931090.
dc.identifier.issn0018-9383 (print)
dc.identifier.issn1557-9646 (online)
dc.identifier.urihttp://hdl.handle.net/10467/87100
dc.description.abstractIn the first part of this article, we have proposed an innovative approach to improve the drain current model of the MOSFETs implemented with the diamond layout style (DLS), regarding the longitudinal corner effect (LCE). The proposed model is more accurate than a previous model compared to 3-D TechnologyComputer-AidedDesign (3-D TCAD) simulation results. The new model has an innovative analytical description based on a conformal mapping theory. As a conformal mapping, there has been chosen a Schwarz–Christoffel transformation (SC). The maximal deviation values of the aspect ratio calculated by LCE are in the range from −27% to +38%. In counterpart with the new SC analytical description of DLS, the maximal deviation values are in the range from 0% to −5.5%. The second part of this article describes improvements in the electrical performance of the N-MOSFET components by using DLS counterpart to traditional rectangular layout style (RLS). Both layout style DLS, RLS, respectively, have the same process settings, as well as they are keeping the same gate area A, and an aspect ratio width to length W/L to preserve the same input conditions for their analysis. The maximal drain current increasing for the simulated DLS MOS transistor is over 20% for effective aspect ratio (W/L)eff equal to 2.0 and the angle is set to 60 grads. The presented model has a very good analytic description with the error level lower than 3%.eng
dc.format.mimetypeapplication/pdf
dc.language.isoeng
dc.publisherIEEE
dc.relation.ispartofIEEE Transactions on Electron Devices
dc.subjectConformal mappingeng
dc.subjectdiamond layout styleeng
dc.subjectMOSFETeng
dc.titleImprovements in the Electrical Performance of IC MOSFET Components Using Diamond Layout Style Versus Traditional Rectangular Layout Style Calculated by Conformal Mappingeng
dc.typečlánek v časopisecze
dc.typejournal articleeng
dc.identifier.doi10.1109/TED.2019.2931090
dc.rights.accessrestrictedAccess
dc.identifier.wos000482583200003
dc.type.statusPeer-reviewed
dc.type.versionpublishedVersion
dc.identifier.scopus2-s2.0-85071224840


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