Prohlížení Publikační činnost ČVUT dle předmětu "logic synthesis"

Zobrazují se záznamy 1-2 z 2

    • Asynchronous sum-of-products logic minimization and orthogonalization 

      Autor: Lemberski I.; Fišer P.; Suleimanov R.
      (John Wiley & Sons, Inc., 2014)
      We propose a method of the asynchronous sum-of-products (SOP) logic simplification that comprises of minimization and orthogonalization. The method is based on a transformation of the conventional single-rail SOP synchronous ...

    • SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support 

      Autor: Fišer P.; Háleček I.; Schmidt J.; Šimek V.
      (World Scientific Publishing, Ltd., 2019)
      This paper presents a method for generating optimum multi-level implementations of Boolean functions based on Satisfiability (SAT) and Pseudo-Boolean Optimization (PBO) problems solving. The method is able to generate one ...