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dc.contributor.authorSocha P.
dc.contributor.authorMiškovský V.
dc.contributor.authorKubátová H.
dc.contributor.authorNovotný M.
dc.date.accessioned2020-02-20T17:48:42Z
dc.date.available2020-02-20T17:48:42Z
dc.date.issued2019
dc.identifierV3S-332371
dc.identifier.citationSOCHA, P., et al. Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative. Microprocessors and Microsystems. 2019, 2019(71), 1-8. ISSN 0141-9331. DOI 10.1016/j.micpro.2019.102858.
dc.identifier.issn0141-9331 (print)
dc.identifier.issn1872-9436 (online)
dc.identifier.urihttp://hdl.handle.net/10467/86911
dc.description.abstractCorrelation power analysis (CPA) is one of the most common side-channel attacks today, posing a threat to many modern ciphers, including AES. In the final step of this attack, the cipher key is usually extracted by the attacker by visually examining the correlation traces for each key guess. The naïve way to extract the correct key algorithmically is selecting the key guess with the maximum Pearson correlation coefficient. We propose another key distinguisher based on a significant change in the correlation trace rather than on the absolute value of the coefficient. Our approach performs better than the standard maximization, especially in the noisy environment, and it allows to significantly reduce the number of acquired power traces necessary to successfully mount an attack in noisy environment, and in some cases make the attack even feasible.eng
dc.format.mimetypeapplication/pdf
dc.language.isoeng
dc.publisherElsevier Science
dc.relation.ispartofMicroprocessors and Microsystems
dc.relation.urihttps://www.sciencedirect.com/science/article/pii/S0141933118305155
dc.subjectSide channel attackeng
dc.subjectCorrelation power analysiseng
dc.subjectPearson correlation coefficienteng
dc.subjectKey distinguishereng
dc.subjectEdge detectioneng
dc.titleEfficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivativeeng
dc.typečlánek v časopisecze
dc.typejournal articleeng
dc.identifier.doi10.1016/j.micpro.2019.102858
dc.relation.projectidinfo:eu-repo/grantAgreement/Czech Science Foundation/GA/GA16-05179S/CZ/Fault-Tolerant and Attack-Resistant Architectures Based on Programmable Devices: Research of Interplay and Common Features/
dc.rights.accessembargoedAccess
dc.date.embargoEndDate2021-11-30
dc.identifier.wos000500052000034
dc.type.statusPeer-reviewed
dc.type.versionacceptedVersion
dc.identifier.scopus2-s2.0-85070191187


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