Design of System On Chip with RISC-V processor for USI graphical pen controller
Návrh systému na čipu s procesorem RISC V pro řídící obvod USI digitálního grafického pera
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České vysoké učení technické v Praze
Czech Technical University in Prague
Czech Technical University in Prague
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Tato diplomová práce se zabývá RTL návrhem a implementací systému systému na čipu na procesorové platformě RISC-V pro USI ovladač grafického pera. Současný SoC ovladače pera založeného na CoolRISC je analyzován a na základě této analýzy je vytvořen systémový návrh pro nové SoC ovladače pera založeného na RISC-V. RTL návrh nového SoC je implementován do 180\,nm technologie a jeho systémová spotřeba energie je měřena v simulaci a poté porovnána se stávajícím systémem na bázi CoolRISC. Práce se také zabývá technickým srovnáním procesorových platforem CoolRISC a RISC-V.
This diploma thesis covers the RTL design and implementation of System On Chip based on the RISC-V processor platform for USI graphical pen controller. The current CoolRISC-based pen controller SoC is analysed and based on this analysis new system design for the RISC-V-based pen controller SoC is created. The RTL design of the new SoC is implemented into 180\,nm technology, and its system power consumption is measured in simulation and then compared to the existing CoolRISC-based system. The thesis also covers the technical comparison between CoolRISC and RISC-V processor platforms.
This diploma thesis covers the RTL design and implementation of System On Chip based on the RISC-V processor platform for USI graphical pen controller. The current CoolRISC-based pen controller SoC is analysed and based on this analysis new system design for the RISC-V-based pen controller SoC is created. The RTL design of the new SoC is implemented into 180\,nm technology, and its system power consumption is measured in simulation and then compared to the existing CoolRISC-based system. The thesis also covers the technical comparison between CoolRISC and RISC-V processor platforms.