Automatic FPGA based implementation of a classification tree

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We propose a method of automatic hardware implementation of a decision rule based on the Adaboost algorithm. We review the principles of the classification method and we evaluate its hardware implementation cost in term of FPGA’s slice, using different weak classifiers based on the general concept of hyperrectangle. We show how to combine the weak classifiers in order to find a good trade-off between classification performances and hardware implementation cost. We present results obtained using examples coming from UCI databases.

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Johel Miteran, Jiri Matas, Julian Dubois, and Elbey Bourennane. Automatic fpga based implementation of a classification tree. In IEEE SCS: Proceedings of the 1st International Conference on "Signaux, Circuits et Systemes", pages 188-192, 10662 Los Vaqueros Circle, P.O.Box 3014, CA 90720-1314, Los Alamitos, USA, March 2004. L'Ecole Nationale d'Ingénieurs de Sfax, France, IEEE Computer Society.

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